In an ATM Inverse Multiplexing System (formerly referred to as AIMUX but presently referred to as IMA, for Inverse Multiplexing for ATM), ATM cell traffic is transported by means of time-division multiplexing over several channels (typically T1 or E1 data links). In a cell based IMA system, these ATM cells (defined here as "payload cells") are sent on each channel in a round-robin fashion as depicted in FIG. 1. In FIG. 1, an incoming cell stream 20 from an ATM layer on bus interface 21 is received by IMA device 11 of IMA system 10 and is coupled to another IMA device 12 by three channels or links 14, 16, and 18. Incoming cells 20 on incoming bus interface 21 enter the IMA device 11 and are time-division multiplexed over links 14, 16, and 18. In each channel or link 14, 16, or 18, a sequence number "S" cell is inserted periodically, as determined by a specified time interval or by a given number of cells. In this case an "S" cell precedes each series of cells from the incoming cell stream over a selected time interval or for each of a selected number of incoming cells. Another "S" cell is inserted on each channel after the last cells of the given set of cells in the incoming cell stream has been transmitted. At the IMA device 12, the egress payload cell stream is reconstructed by assembling incoming cells on each channel in the same order as they were transmitted.
A more specific configuration is shown in FIG. 2, in which one ATM Layer Device 18 is coupled through an IMA system 10 to another ATM Layer Device 19. The ATM Layer Device 18 connects to IMA device 11 via Utopia/SCI-PHY bus interface 21 which, in turn, is coupled to a number of physical layer devices 30 by Utopia/SCI-PHY bus interface 14. Each physical layer (PHY-layer) device 30 is coupled by links 34 and 36 to another corresponding physical layer device 32. Each physical layer device 32 is connected to IMA device 12 by one of several Utopia/SCI-PHY bus interface 16. IMA device 12 connects to ATM Layer device 19 by Utopia/SCI-PHY bus line 22.
Cells from ATM Layer Device 18 are sent to IMA device 11 which multiplexes them together with "S" cells, onto bus lines 14. A transmitting PHY-layer ATM device 30 sends idle cells over its link for the purpose of cell rate decoupling whenever its transmit FIFO buffer (not shown) is empty. This can occur when the incoming ATM traffic is either bursty or if the cells arrive at a rate slower than the transmit rate of the PHY device 30.
The receiving IMA device 12 must reconstruct its output stream from cells received over the constituent channels, in such a way that cell sequence integrity is preserved. Referring to FIG. 3, an input cell stream 13 is multiplexed over three links 15 (link #1), 17 (link #2), and 19 (link #3). An S cell precedes cell #1 followed by cell #1. Similarly, an S cell precedes cell #2 followed by an idle cell containing an error (error(2)) and an S cell on link 19 is followed by cell #3. The remaining cells are sent in the order shown in FIG. 3 with cells #4 and #8 containing errors (error(1) and error(3), respectively). Suppose a payload (or S) cell is lost due to an HEC error, as shown in FIG. 3 (event error (1)). If the cells are simply reassembled directly according to the successfully received payload cell sequence in each channel or link, then the output cells will no longer be delivered in the correct sequence to the ATM-layer device 12, as can be seen in FIG. 4. These errors will not be detected until an S cell is subsequently received (error-free), at which point the IMA device will realize the problem because the number of payload cells received between that and the previous S cell will be different from what is expected.
It will be seen that mis-sequencing occurs from a combination of 1)idle cells inserted in a manner that disrupts the ordered arrival sequence of payload cells and, 2) ambiguities as to where these idle cells may be in the received cell stream (and guessing wrong). These are consequences of using channels that operate in an asynchronous manner, where each channel may be operating at slightly (but nevertheless significantly) different frequencies and phase differences relative to the other channels at any given time. The mis-sequencing problem can be solved by having the channels operate synchronously with each other, but that may not always be feasible as it depends very much on the underlying telephone network infrastructure.
ATM PHY devices 32 are typically configured to discard idle cells and cells with HEC errors. If these devices can be programmed to pass HEC-errored cells on to the higher layers, additional information can be used to assist in the decoding process (see ATMF 95-1659, "Synchronous Links, Cell Loss Handling, and Control Cells in AIMUX", December 1995). However, the IMA device 12 will still need to guess whether or not a HEC-errored cell corresponds to an idle cell. Now suppose that the number of payload cells framed between two S cells is fixed. The IMA device 12 can now use this information to identify errored cells by buffering all subsequently received cells for the remainder of the frame, and count the number of payload cells (see ATMF 95-1659, supra.). If the number of payload cells is less than expected, then it may be possible to determine the position of any missing payload cell by determining the locations of the HEC-errored cells. Furthermore, cell arrival timing information can be used to reduce the range of possibilities. This can be done by either explicitly recording the arrival times or by having the PHY devices pass idle cells through. Even if all these measures are taken, certain error patterns can produce unresolved ambiguities that lead to error multiplication. An example is shown in FIG. 3 for events error (2) and error (3), where the corresponding decoded sequence is shown in FIG. 5. Moreover, buffering schemes such as this one will not work if the number of payload cells in a given frame is unknown.
Accordingly, it is an object of the invention to provide a more robust solution to reduce error multiplication, as compared to the known schemes. It is a further object of the invention to provide error free multiplication which does not require additional PHY-layer signaling information from known schemes which work over asynchronous multiplexed channels. It is yet a further object of the invention to provide a solution to reduce error multiplication with no additional transmission overhead compared to existing schemes and which does not require an inordinate increase in implementation complexity or memory requirement.